5.1 Vias

5.1.1 Hole Spacing

Hole Spacing

Figure 31: Spacing requirements for holes and vias

[44] The spacing between holes must satisfy B 5mil.

[45] The spacing between holes and any copper trace/pour must satisfy: B1 & B2 5mil.

[46] The spacing between plated through holes (PTH) to the board edge: B3 20mil.

[47] The recommended minimum distance from non-plated through holes (NPTH) wall to the board edge is D

40mil.

5.1.2 Via hole banned layout area

[48] Via holes must not overlap solder pads.

[49] Via holes must not be in a region that extends 1.5mm from the metal shell of any components.

5.2 Mechanical Hole Design

5.2.1 Hole Types

Table 5: Recommended hole designs according to function

Hole Types

Figure 32: Structure of mechanical holes.

5.2.2 Spacing Requirements

Table 6: Spacing requirements for mechanical holes according to type.

Spacing requirements for mechanical holes

More Chapaters:
1. Brief Introduction
2. Seeed Fusion PCB Specification
3. Panelization and Bridge Design
4. Component Layout Considerations
6. Solder Mask Design
7. Copper Trace Design
8. Silkscreen Design
9. PCB Lamination Structure
10. PCB Dimensions Specification
11. Fiducial Mark Design
12. Surface Treatment
13. Files for Manufacture Requirements
14. Appendix 

Extend Reading:
PCB Via – Plating Through Hole, Blind Via Hole And Buried Via Hole