DSO v2.81 ?

I’ve been wanting a DSO Quad for a while and I have been trying to do a lot of reading about it. I finally got mine, but I was surprised to see it say it’s HW V2.81. I never saw references to this version before. Will replacement firmware work on this? TIA
IMG_20141007_141225-small.jpg

It’s supposed to.

Saw this a couple of weeks ago on the MiniDSO site.
Quoted from the post, translated from Chinese:

“Hardware Ver 2.81 version of the DS203 uses larger capacity STM32F103VE FPGA chip and new models
Therefore FPGA and LOGO updated boot file FPGA_281.ADR, 281_FPGA.BIN and LOGO_281.ADR
with Ver 2.72 and earlier versions, so be sure to update the corresponding version.
SYS and APP programs are generic functions are the same.”

They had the mentioned files available for download.

There may be some issues though with programs that use undocumented portions of the ROM.
It looks like the loading addresses are shifted around, haven’t checked this out so I don’t know
for sure.

The files posted for version 2.81 show the following, with differences from the previous versions noted:

Size of 2.81 FPGA BIN file = 135,096 bytes original version was= 68,088 bytes
Loading address of FPGA = 0x5C800 original version was= 0x2C000 (loading address of FPGA is the end of the program area)
Loading address of LOGO = 0x7D800 original version was= 0x3D800
End of factory mapped = 0x80000 original version was= 0x40000

Start of program area = 0x0C000 49,152 bytes (1.5 slots where the bootloader and sys reside and at the end of which is some
spare area)
“slot” size = 0x08000 32,768 bytes
Program area size = 0x50800 329,728 bytes (10 slots) original version was= 0x20000 131,072 bytes (4 slots)

The “undocumented” part of the ROM in the older versions was due to the cpu having a higher capacity than it’s designation would
indicate (which was 256K). It could have either 384K or 512K. Some programmers took advantage of this by putting code after the
end at 256K. There also some free area at the end of the SYS, just before the start of the program area, this should not change.

Now, with the 2.81 version, the undocumented portion has become “documented”, so to speak, and the factory is putting it’s FPGA
and LOGO code at the end, up to 512K. This extends the program area to a bit over 10 slots, all continuous. Any “undocumented”
ROM loads between the end of the original version (0x40000) and the start of the new FPGA section (0x5C800) should be ok
as they fall within the new program area “slots”. However going past the FPGA start will likely disable the device. This should not be
a major problem if it happens, as the new 2.81 version FPGA code is available and would just need to be reloaded.

This also brings up the question of how to access the extra slots with 10 different starting points now for programs. There are actually
10 different button functions (4 push + 3 each for the toggles), has the bootloader been set up to work this way? Or have the slots
been spread out and only the original 4 starting points retained? Or something else yet? Unless we can get more info on this, it will be up to
the owner of such a device at this point to check it out.

Another item of interest is the size of the FPGA BIN file, twice the size of the original. The translation from the site is rather vague,
but it may be that the FPGA IC has been replaced with a different chip. This would seem to make sense as the original from Silicon Blue
is no longer available.

To summarize on the original question, any version that uses the normal slots in sequence should be ok. This includes any of the versions
posted on the Community Edition thread, including my own, and any of the compatible factory versions. Software that aggregates
several versions together such as the Four Pack and others that are large programs split in such a way that only one slot is used for the
beginning of the code, with the rest loaded in the aforementioned undocumented area could run into trouble it they overwrite the FPGA
section. This should be addressed by the respective authors.

I do not know, if is in this version some bugs about virtual USB disk, but it not seems as hw problem … when I connect it to PC in standard mode, then is connected usb storage well (8MB). But when I connect it in “Hold + power on” mode, then time to time is virtual USB disk (2MB) periodicaly disconnected/connected.

When is connected in 2/3/4 + power on mode, then: “USB device is not recognized” always. Tried on more OS (XP, Win7, Win8.1)

BTW - does exist some way, how remove installed application from it ?

Where could be downloaded original last firmware ?

I must install it under Linux - there is not virtual disk disconected. And after install is visible .rdy file

Older versions with 2Mb drives had file corruption problems from improperly written
System files. With the release of the 8Mb versions, this was corrected (Sys v1.60 and up).
However programs had to be re-written to be compatible with the new Sys.
See the “Fixing the 2.72 8M Issues” thread below. This may relate to some of the problems
you are having.

If you have not loaded anything in either slots 1 or 2 (original programs use 2 “slots”
in sequence), then the original program file should be ok, and it may be the system file
that needs to be reloaded.

The only way to “remove” any app or sys is to overwrite it with something. If you installed
a patch or program that included updated code to repair the file corruption of early
drives, then the sys file will need to be reloaded. The Alterbios patch and possibly
some versions of Pawn (which I believe included some form of the Alterbios patch)
put some code in the sys section.

I don’t see Sys V1.62 posted anywhere, however V1.61 should work, as the main
issue to be concerned with is compatibility with the 8Mb drive, which has been
supported from V1.60 up.

EDIT: They just posted Sys V1.62 on the Seed Wiki link below.

App version 1.13 and Sys version 1.61 can be downloaded from here:
minidso.com/forum.php?mod=vi … a=page%3D1

Version 2.81 FPGA files can be downloaded from here:
minidso.com/forum.php?mod=vi … a=page%3D1
(The FPGA ADR file is first copied to the DFU, this tells the device where to load, then
the BIN file is copied) The LOGO ADR file is used in the same way to relocate the
logon splash screen to it’s new address, if needed.

Instructions for using Linux can be found here:
seeedstudio.com/wiki/DSO_Qua … g_Firmware

what’s new in app 1.13?

  • Bug fix.
  • Added some hook for internal test.

Any chance the source code will be accessible?

Q. about AC calibrate:

A1 … 1V
A2 … 0.5V

A3 … for 10x probe - but what voltage and what calibrate there ?

Hi guys, I noticed you have also HW2.81, would you mind to download DFU for me from device please? I broke mine DFU and there’s not DFU for HW2.81 on wiki pages yet. Thank you.