{"id":15579,"date":"2017-05-17T15:13:37","date_gmt":"2017-05-17T07:13:37","guid":{"rendered":"http:\/\/www.seeedstudio.com\/blog\/?p=15579"},"modified":"2019-06-17T17:38:49","modified_gmt":"2019-06-17T09:38:49","slug":"hole-design","status":"publish","type":"post","link":"https:\/\/www.seeedstudio.com\/blog\/2017\/05\/17\/hole-design\/","title":{"rendered":"Hole Design – PCB DFM Part 5"},"content":{"rendered":"

5.1 Vias<\/h2>\n

5.1.1 Hole Spacing<\/h3>\n

\"Hole<\/p>\n

Figure 31: Spacing requirements for holes and vias<\/p>\n

[44] The spacing between holes must satisfy B 5mil.<\/p>\n

[45] The spacing between holes and any copper trace\/pour must satisfy: B1 & B2 5mil.<\/p>\n

[46] The spacing between plated through holes (PTH) to the board edge: B3 20mil.<\/p>\n

[47] The recommended minimum distance from non-plated through holes (NPTH) wall to the board edge is D<\/p>\n

40mil.<\/p>\n

5.1.2 Via hole banned layout area<\/h3>\n

[48] Via holes must not overlap solder pads.<\/p>\n

[49] Via holes must not be in a region that extends 1.5mm from the metal shell of any components.<\/p>\n

5.2 Mechanical Hole Design<\/h2>\n

5.2.1 Hole Types<\/h3>\n

Table 5: Recommended hole designs according to function<\/p>\n

\"Hole<\/p>\n

Figure 32: Structure of mechanical holes.<\/p>\n

5.2.2 Spacing Requirements<\/h3>\n

Table 6: Spacing requirements for mechanical holes according to type.<\/p>\n

\"Spacing<\/p>\n

More Chapaters:<\/strong>
\n1.\u00a0Brief Introduction<\/a>
\n2.\u00a0Seeed Fusion PCB Specification<\/a>
\n3.\u00a0Panelization and Bridge Design<\/a>
\n4.\u00a0Component Layout Considerations<\/a>
\n6.\u00a0Solder Mask Design<\/a>
\n7.\u00a0Copper Trace Design<\/a>
\n8.\u00a0Silkscreen Design<\/a>
\n9.\u00a0PCB Lamination Structure<\/a>
\n10.\u00a0PCB Dimensions Specification<\/a>
\n11.\u00a0Fiducial Mark Design<\/a>
\n12.\u00a0Surface Treatment<\/a>
\n13.\u00a0Files for Manufacture Requirements<\/a>
\n14.\u00a0Appendix\u00a0<\/a><\/p>\n

Extend Reading:<\/strong>
\nPCB Via \u2013 Plating Through Hole, Blind Via Hole And Buried Via Hole<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

5.1 Vias 5.1.1 Hole Spacing Figure 31: Spacing requirements for holes and vias [44] The<\/p>\n","protected":false},"author":40,"featured_media":15580,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_lmt_disableupdate":"","_lmt_disable":"","_price":"","_stock":"","_tribe_ticket_header":"","_tribe_default_ticket_provider":"","_tribe_ticket_capacity":"0","_ticket_start_date":"","_ticket_end_date":"","_tribe_ticket_show_description":"","_tribe_ticket_show_not_going":false,"_tribe_ticket_use_global_stock":"","_tribe_ticket_global_stock_level":"","_global_stock_mode":"","_global_stock_cap":"","_tribe_rsvp_for_event":"","_tribe_ticket_going_count":"","_tribe_ticket_not_going_count":"","_tribe_tickets_list":"[]","_tribe_ticket_has_attendee_info_fields":false,"iawp_total_views":0,"footnotes":""},"categories":[1],"tags":[555,4,648],"class_list":["post-15579","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","tag-dfm","tag-pcb","tag-pcb-dfm"],"yoast_head":"\nHole Design - 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