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Bus Blaster v3 is an experimental, high-speed JTAG debugger from Dangerous Prototypes. Thanks to a reprogrammable buffer, a simple update over USB makes Bus Blaster compatible with many different JTAG debugger types in the most popular open source software.
Based on FT2232H with high-speed USB 2.0
Buffered interface works with 3.3volt to 1.8volt targets
Reprogrammable buffer is compatible with multiple debugger types
Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more ships with JTAGkey compatible buffer image pre-programmed
Should support Serial Wire Debug when available
Mini-CPLD development board: self programmable, extra CPLD pins to header
Open source (CC-BY-SA)
Bus Blaster Manual
Bus Blaster design overview
Bus Blaster forum
CPLD buffer logic overview
Fitted in a DP8049 (80x49 mm) standard PCB, case available here
Added series resistors to input and output pins to protect against damage and noise
Swapped FT2232 clock output to CPLD pin with global clock feature for potential logic analyzer mode
This open source hardware and software is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
This product is designed by Dangerous, If you encounter any problems when using this product, please request technical support in the forum.
<p>I've found that the adaptor is needed to be referenced as
/dev/ttyUSB0 and /dev/ttyUSB1 in the OpenOCD configuration file, i.e., </p><p style="margin-left: 25px;"><b>source [find interface/ftdi/dp_busblaster.cfg]<br>adapter_khz 20000<br>source [find target/esp32.cfg]<br></b><br></p><p>I don't know how to change, but pluging the adaptor first, before the others, is still current solution.</p><p><br></p><p><br></p><p><br></p>